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When trying to use ASC or CAN bootstrap for flash programming on STM32 targets I have no success.
Read moreTry: Check pins BOOT[1:0] = "01" for enabled boot from system memory. Check if your target is affected by errata 2.13 and do the required settings (see STM32F105xx and STM32F107xx Errata sheet) ...
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What are the restrictions when debugging TriCore PCP code ?
Read moreThese are: Full context Otherwise the unsaved registers cannot be restored after a channel break (breakpoint or step), the unsaved registers will have an undefined contents the debugger is not prepared for other than full context ...
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My Programs runs well when using UDE® and LPC1000. But it is not running standalone, what could be the reason?
Read moreProbably you flashed a wrong checksum to reserved vector location 7 (Offset
0x1C). The bootcode does not start your application if the checkksum is invalid. The checksum is simply the twos complement of all DWORDs before ... -
Why is the SPC56EL, MPC564L DualCore controller in Lockstep mode hanging in SAFE mode when running without UDE® ?
Read moreThat happens typically when some registers are not initialized before using, e.g. the 64 bit general purpose register for spe instructions. after reset these registers will have random content on both cores. if that register are used that could result in different results on both cores which will raise a lockstep error ...
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How can I switch between DPM and LSM mode on PowerPc DualCore MPC5675K devices ?
Read moreDual processor mode and lockstep mode is configured inside the Shadow Flash. The actual state could be observed using the SSCM User Option Status Register (UOPS). The mode could be switched using address
0x0020_3E18in the Shadow flash. Bit0x0040_0000has to be set for LSM and cleared for DPM mode ... -
How can I switch between DPM and LSM mode on PowerPc DualCore SPC56EL/MPC5643L devices ?
Read moreDual processor mode and lockstep mode is configured inside the Shadow Flash. The actual state could be observed using the SSCM User Option Status Register (UOPS). The mode could be switched using address 0x00FF_FE10 in the Shadow flash. Bit 0x0040_0000 has to be set for LSM and cleared for DPM mode ...
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How do I debug my multicore MPC551x with two *.elf or *.hex files ?
Read moreFlash programming via UDE® Memtool is only possible via master core 'z1'. So even the
*.elffile for the 'z0' core must be flashed via 'z1' core. The best method for doing so is following step-by-step guide ... -
How do I debug dual core MPC551x with two different *.elf files ?
Read moreCommand Sequence. Create a new workspace usind the default cfg-File for multicore debugging (NXP MPC5510EVB Evalboard with MPC5517E (Jtag/Multi Core debug z0 and z1/VLE)), make sure both cores are enabled ...
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How could I enable MultiCore support for MPC5516 inside UDE® ?
Read moreInstall the latest UDE® version ...
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When debugging operation systems on PPC440 with simultaneous application/kernel debugging breakpoints af application debugger always result in kernel debugger halt.
Read moreThat behavior occurs due to the nature of implementing software breakpoints on the PPC440. The kernel debugger uses the TRAP instruction to patch software breakpoints. The application debugger does it in the same way ...
