Synopsys ARC® Processors

DesignWare® ARC® processor family from Synopsys is a IP core licensed by a large number of semiconductor companies and chip manufacturers.

The ARC® processor cores feature a flexible and powerful 32-bit instruction set architecture (ISA) and are designed and optimized for a wide range of embedded and deep embedded applications.

UDE Debugger Solution for Synopsys ARC® Processors and IP Cores

UDE - Universal Debug Engine - is a flexible debug and test platform for multi-core debugging and trace of SoCs and microcontrollers implementing the DesignWare® ARC® processor.

  • Device families: DesignWare® ARC® EM, EV, HS3x, HS4x, HS5x
  • Support for 32-bit ARCv2 ISA and
    • DSP instruction set extension
    • ARC® EV vector instruction set extension
    • ARC® EV vector super instructions
  • Supported compilers:
    • ARC® MetaWare Development Toolkit
    • GNU toolchain for Synopsys ARC® processors
  • Multicore debugging for devices implementing ARC® cores
  • Debug access via JTAG and cJTAG
  • SmaRT trace support for ARC® EM and HS

ARC® Processors and IP Cores supported by UDE Debugger

  • DesignWare ARC EM Processor Family: EM4, EM5, EM6, EM7, EM9, EM11, EM22
  • DesignWare ARC EV Processors for Embedded Vision: EV7x
  • DesignWare ARC HS Processor Family: HS3x, HS4x, HS5x
  • ARC EV based Parallel Processing Unit (PPU) for AURIX TC4x

Supported ARC® Debug, Trace and Test Features with Universal Debug Engine (UDE Debugger)

UDE - Universal Debug Engine with multi-core support - Cortex Debugger and Emulator for Synopsys ARC

UDE - Universal Debug Engine - is a flexible debug and emulator platform with Multicore debugging for Synopsys ARC.

Ordering Code

UDE-LIC-ARC / <Selected Access device>