Universal Emulation Configurator UEC for Advanced Trace Configuration

The Universal Emulation Configurator (UEC) is a device-independent tool, used to create trace-based debug and measurement tasks for on-chip emulators and powerful on-chip trace systems in a comfortable way.

The UEC allows users to graphically compose complete trace tasks using a library of basic configuration blocks. In this way, trace tasks starting from simple trace recordings up to complex trace tasks with state machines and complex conditions for issuing trace actions can be easily created.

The UEC hides the complexity of trace configuration. The user does not have to worry about the huge amount of settings normally required to configure a trace for complex multi-core microcontrollers. All this is done automatically.

Major benifits of UEC

• Fast and simple definition of complex measuring tasks
• Functional description of trace tasks in a user-friendly way
• Simplifying complex configuration settings by providing meaningful configuration blocks
• Easy composing of even complex trace configurations by means of state machines and conditions
• Independent from the actual target and emulator hardware

UEC for Multi-core Debug Solution (MCDS) of AURIX™

Multi-core Debug Solution (MCDS) is a powerful trace system available for Infineon AURIX™ Emulation Devices (TC3xxED).

Features of MCDS on AURIX™ TC3xxED supported by UEC

• Instruction trace of cores
• Data trace of cores and busses
• Parallel trace of different trace clients (cores, busses, etc.)
• Determining the exact execution timings
• Gathering profile information
• State machines for filtering and triggering trace recording
• Filtering of trace samples using timers and counters
• Run-control based on MCDS triggers
• GTM trace
• Trace of peripherals
• Performance counter trace
• And more

UEC for AURIX™ miniMCDS

miniMCDS is a light wight, function limited trace system available for selected AURIX™ devices.

Features of miniMCDS on AURIX™ supported by UEC

• Instruction trace of one core
• Data trace of one core
• Determining the exact execution timings
• Gathering profile information (limited by available trace memory)
• State machines for filtering and triggering trace recording
• Filtering of trace samples using timers and counters
• Run-control based on MCDS triggers
• GTM trace
• And more

UEC for Nexus Sequence Processing Unit (SPU) of PowerArchitecture™

Sequence Processing Unit (SPU) is part of the NEXUS trace and debug support of latest multi-core Power Architecture™ controllers from NXP and ST Microelectronics. SPU is connected to all debug and NEXUS clients and provide cross-trigger functionality for enhanced and powerful debug and trace scenarios.

UDE’s Universal Emulation Configurator (UEC) provides an easy to use and flexible graphical configuration frontend to get access to the complete SPU functionality.

Features of NEXUS trace on PowerArchitecture™ devices supported by UEC

• Instruction trace of cores
• Data trace of cores and busses
• Parallel trace of different trace clients
• Determining the exact execution timings
• Gathering profile information
• State machines for filtering and triggering trace recording
• Filtering of trace samples using timers and counters
• GTM trace
• Trace of NXMC clients

UEC for CoreSight™ trace on ST Stellar

ST's Stellar family of microcontrollers offers trace support based on Arm CoreSight™ for the Cortex®-R52 and Cortex®-M4 cores. In addition, traces can also be generated for the GTM as well as for the on-chip interconnect (NoC).

Features supported by by UEC

• Instruction trace of cores
• Data trace of cores
• Trace of data transactions over the on-chip interconnect (NoC)
• Parallel trace of different trace clients
• Determining the exact execution timings
• Gathering profile information
• Filtering of trace samples
• GTM trace

UEC for Multi-core Debug Solution (MCDS) of TriCore™

Multi-core Debug Solution (MCDS) is a powerful trace system available for Infineon TriCore™ Emulation Devices (TC17xxED).

Features of MCDS on TriCore™ supported by UEC

• Instruction trace of cores
• Data trace of cores and busses
• Parallel trace of different trace clients (cores, busses, etc.)
• Determining the exact execution timings
• Gathering profile information
• State machines for filtering and triggering trace recording
• Filtering of trace samples using timers and counters
• Run-control based on MCDS triggers
• Performance counter trace
• And more

UEC for Multi-core Debug Solutions (MCDS) XC2000ED

The so-called emulation device XC2000ED with integrated on chip emulator is available for development and test purposes. Up to now only the UEC from PLS offers a complete support of this high-performance debug hardware.

Features of MCDS for XC2000ED supported by UEC

• Instruction trace
• Data trace
• Determining the exact execution timings
• Gathering profile information (limited by available trace memory)
• State machines for filtering and triggering trace recording
• Filtering of trace samples using timers and counters
• Run-control based on MCDS triggers
• Performance counter trace

MCDS is supported by the XC2000ED family, including XC2080ED and XC2090ED.