SuperH™ SH-2A Microcontrollers from Renesas

Microcontroller Debugger solutions for SuperH™ SH-2A from Renesas

The SH-2A processor is a 32-bit RISC processor based on the SuperH architecture of Renesas. It has been developed to provide a High-performance CPU core and large-capacity RAM for superior functional products.

  • 32-bit RISC superscalar architecture
  • High-performance instruction compatibility with the SH-2 and SH-2E
  • Harvard cache architecture
  • 5-stage pipeline
  • 4 GBytes Address space
  • 15 internal dedicated register banks
  • Cache memory
  • FPU (Floating-point unit)
  • RAM access-able in a single clock cycle
  • DMAC (Direct memory access controller)
  • MTU2 (Multifunction timer units)
  • A/D and D/A converters

SuperH SH-2A Cores supported by UDE Debugger

  • SuperH SH-2A

SuperH SH-2A Microcontrollers supported by UDE Debugger

  • SH7201 SH7211 SH7251 SH7254 SH7266 SH7267

Supported SuperH Debug, Trace and Test Features with Universal Debug Engine (UDE Debugger)

UDE - Universal Debug Engine - Debugger and Emulator for SuperH™ SH-2A

UDE - Universal Debug Engine - is a flexible debug and emulator platform for Renesas SuperH SH-2A.

Ordering Code

UDE-LIC-SH2A / <Selected Access device>