Renesas SuperH™ SH-2A Microcontrollers
UDE Debug, Trace and Test solutions for Renesas SuperH™ SH-2A
The SH-2A processor is a 32-bit RISC processor based on the SuperH™ architecture of Renesas. It has been developed to provide a High-performance CPU core and large-capacity RAM for superior functional products.
- 32-bit RISC superscalar architecture
- High-performance instruction compatibility with the SH-2 and SH-2E
- Harvard cache architecture
- 5-stage pipeline
- 4 GBytes Address space
- 15 internal dedicated register banks
- Cache memory
- FPU (Floating-point unit)
- RAM access-able in a single clock cycle
- DMAC (Direct memory access controller)
- MTU2 (Multifunction timer units)
- A/D and D/A converters
Renesas SuperH SH-2A Cores supported by UDE
- SuperH SH-2A
Renesas SuperH SH-2A Microcontrollers supported by UDE
- SH7201 SH7211 SH7251 SH7254 SH7266 SH7267
Renesas SuperH SH-2A Debug, Trace and Test Features supported by UDE
- Microcontroller debug support
- FLASH Memory programming
- Test Automation and Test Scripting Support with Python and other scripting languages
- Eclipse Plug-in
UDE - Universal Debug Engine - Debugger and Emulator for SuperH™ SH-2A
UDE - Universal Debug Engine - is a flexible debug and emulator platform for Renesas SuperH SH-2A.
