Device Access Port (DAP / DAP2) with up to 160 MHz serial clock support

2-pin DAP / 3-in DAP2

The 2-pin and 3-pin Device Access Ports (DAP) as well as a 3-pin DAP2 was established by Infineon, for the TriCore™ AUDO Future, AUDO MAX, and AURIX devices, as well as for other upcoming 16-bit and 32-bit microcontrollers. The Device Access Port DAP/DAP2 allows debug communication with higher transmission rates than existing JTAG based communication channels up to 160 MHz.

The block transfer rate of the DAP2 could be increased almost three-fold to 30 MByte/s by means of an optimized protocol.


DXCPL means the transfer of SPD-encoded (Single Pin DAP) DAP messages via CAN bus physical layer as a bi-directional connection and multiplexs the output of the CAN transceiver to the DAP module of the microcontroller instead to the CAN module. The CAN module is disconnected from the CAN transceiver while this time. SPD defines a protocol for transferring the DAP bits. Bandwidth can be up to 1.3 MHz. SPD is used instead the CAN protocol.

DAP Support of the Universal Acces Device

The interfaces

  • DAP
  • DAP2
  • Single-pin DAP via CAN (SPD)
  • DAP over CAN Physical Layer (DXCPL)

are supported by the Universal Access Devices (UAD2pro / UAD2next / UAD3+).

Supported Architectures with Universal Debug Engine (UDE Debugger)