PLS' UDE® supports ST's Stellar SR6P and SR6G Integration MCUs with full multicore debug and trace capabilities

July 8, 2021

The latest version of the UDE® Universal Debug Engine from PLS Programmierbare Logik & Systeme GmbH offers extensive multicore debug and trace functions for the new SR6 P and SR6 G series Arm® Cortex®-R52-based Stellar SR6 Integration MCUs from STMicroelectronics.

The Stellar SR6 P series addresses the next generation of drivetrain, electrification and domain-oriented systems, offering a new level of real-time performance, safety and determinism. Applications for the Stellar SR6 G series range from high-end body integration to zone-oriented vehicle architectures. Hence, the devices combine high performance and energy efficiency with comprehensive connectivity and highest security. Up to six Arm® Cortex®-R52 cores, some of which operate in lock-step or split-lock mode, and up to 20 MByte of embedded phase-change memory (PCM) guarantee multicore performance for real-time applications at the highest level in both model series. Stellar SR6’s innovative dual-image storage enables efficient Over-The-Air (OTA) reprogramming with major savings in memory size through an ST innovation that supports configuring the PCM cell structure to double the memory size during OTA updates.

The UDE®, which has been continuously enhanced over the long-standing involvement of PLS in the ST Partner Program, provides developers with full debug and trace functions for debugging, testing and system analysis for both device series. True multi-core debugging in a user-friendly way is possible in a single debug session and within a single shared debugger instance. The UDE® Multi-Core Run Control enables synchronization of both the Cortex®-R52 application cores and the Cortex®-M4 based accelerator cores of the devices during debugging. Optionally, all cores or a selected group of cores can be started and stopped synchronously.

Multi-core breakpoints, which can be used in shared code, simplify debugging of complex applications. Such a breakpoint is always effective and completely independent of which core is currently executing the respective code. In addition to support for the actual application cores, the UDE® also allows debugging of the hardware security module, which is also integrated, as well as the GTM4, which provides extensive timed-IO functions.

For comprehensive and non-invasive runtime analysis, the UDE® leverages on the extensive trace capabilities of the CoreSight™ debug and trace system of the Cortex®-R52 and -M4 cores. In addition, data transfers via the on-chip network can be observed. The UDE® also provides extensive trace functions for the GTM4. They can be used to observe both the execution of code in the GTM as well as GTM-specific signals with high temporal resolution.

The FLASH programming tool UDE® Memtool integrated in the UDE® provides optimized functions for programming the phase-change memory (PCM) implemented in the Stellar SR6 P and SR6 G series. Special functions guarantee also smooth support of Software-Over-the-Air (SOTA).

For fast and reliable debug communication between the ST devices and the UDE® via Serial Wire Debug (SWD), Developers can choose between the UAD2pro, UAD2next or UAD3+ devices of the Universal Access Device family from PLS. For recording large amounts of trace data off the chip both the UAD2next and the UAD3+ can be used. 512 MB of memory is available in the UAD2next and up to 8 GB of trace memory in the UAD3+. The fast transfer of the trace data is performed in each case via the High Speed Serial Trace Port (HSSTP) of the Stellar SR6 G or SR6 P devices.